See It In Action
Live Dashboard
A floating Altium-side window shows status, request count, cumulative Altium-side time, auto-shutdown countdown, and a per-command log with durations. Hide pings filters the 30 s keep-alive traffic; Only >100ms isolates slow calls. The Detach button saves all dirty docs and exits the polling loop cleanly.
There's also a browser dashboard at http://127.0.0.1:8766, auto-started by the MCP server and focused on design review. A Review tab surfaces datasheet / MPN / manufacturer / footprint coverage gauges and an actionable issue queue (missing datasheet, missing MPN, orphan nets, …); Project, Components, Nets, Libraries and Plan tabs give live structured views. Click any component or net to open a detail drawer and one-click cross-probe it into Altium. Light / dark theme, server-sent-events live feed. The Open Dashboard button on the in-Altium status window launches it.
What It Does
eda-agent is a Model Context Protocol (MCP) server that lets an AI assistant, or any MCP-compatible client, interact with a live Altium Designer session. It exposes 300+ tools covering schematic, PCB, library, project, audit, render, SPICE, and a high-level design-agent surface over a persistent DelphiScript bridge. The AI reads the design you currently have open, asks questions about it, and can modify it in place while you watch.
This is not a batch tool that opens a project, runs a script, and exits. It is a live connection for as long as you want it: conversational design review, guided refactoring, ad-hoc BOM queries, bulk parameter changes, all on the project you currently have open.
Altium is the primary target. A KiCad backend is available as an option, selected at startup, and drives the same core flows over KiCad's IPC API and kicad-cli: design review, DRC and ERC, reads, exports, PCB and library authoring, and end-to-end generation of a schematic, PCB and project from a design plan.
How It Works
- Altium Designer stays open and in full control of your design.
- A DelphiScript polling loop runs inside Altium's scripting engine.
eda-agent(Python, launched by your MCP client) sends commands via file-based IPC.- Altium executes, writes a response, and returns to polling.
- You see the changes happen live in Altium.
All intelligence lives in Python. The DelphiScript side is a pass-through layer for object iteration, property access, and process execution.
Highlights
300+ Tools
Covering application, project, library, schematic, PCB, audit, render, SPICE, and a high-level design-agent surface. Query, modify, create, and delete any supported object.
Optional KiCad Backend
Altium is the default; a KiCad backend ships alongside it, chosen at startup with EDA_AGENT_BACKEND. It runs the same core flows over KiCad's IPC API and kicad-cli: EDA-agnostic review, DRC and ERC, reads, every export format, PCB and library authoring, and full project generation from a design plan.
Optional EasyEDA Pro Backend
A third backend, reached through a small browser extension you import into EasyEDA Pro. The connection runs the other way round from Altium: the editor dials out to the server, so nothing here can start EasyEDA or make it connect. It covers the schematic and PCB read set, the netlist, library search and authoring, exports, and the same EDA-agnostic review and audits. Every reply carries verified_live for the command it used, recorded from real sessions rather than assumed.
Generic Primitives
query_objects, modify_objects, create_object, delete_objects, run_process. Work on almost any schematic or PCB object via late-binding.
Bulk Batch Primitives
batch_create, batch_delete, batch_modify, pcb_place_tracks, pcb_move_components, place_wires, place_net_labels, place_power_ports, place_sch_components_from_library, set_sch_components_parameters, get_sch_doc_pins, lib_add_pins, lib_add_symbol_lines, get_connectivity_many, and more. These collapse N LLM turns into one IPC round-trip. Typical wall-time savings are 10 to 100x.
Design Review Snapshot
design_review_snapshot bundles 8 to 12 review reads (components, nets, rules, diff, messages, stats, unrouted, BOM) into a single call. One turn instead of a dozen.
Connectivity-Driven PCB Auto-Placement
pcb_plan_placement computes a from-scratch component layout: force-directed global placement, hard-shove legalisation, and a per-part orientation search (0/90/180/270) that minimises pin-level half-perimeter wirelength. It reads the netlist, or derives the connectivity graph straight from the PCB pad nets when no schematic is loaded. Pure analytical placement in Python; returns coordinates the AI can preview, refine, or apply.
SVG Render + Visual Self-Check
sch_render_svg and pcb_render_svg turn the live design into a standalone SVG, the PCB render using Altium's actual per-layer colours and visibility rather than a guessed palette. design_visual_review closes the loop: render → rasterise to PNG (headless browser) → score against a critique rubric, so the AI can see what it drew and fix it instead of working blind.
Synced Board Population
pcb_place_component / pcb_place_components drop footprints from a PcbLib straight onto the board. Synced mode links each part to its schematic source by UniqueId and creates / assigns the nets, giving real connectivity without the non-scriptable ECO dialog. A practical, automatable substitute for Update-PCB-Document.
31-Check Audit Suite
design_lint_report runs 31 rule checks in one IPC pass, schematic-side (parameter visibility, power-port orientation, floating ports, no-driver nets, duplicate designators, off-grid parts) and PCB-side (DNP variants, tented-via ratio, near-miss track endpoints, signal vias without a return, via antennas, parts outside the outline, pads too close to the edge, invalid regions). Each check is also a standalone audit_* MCP tool.
BOM HTML Export
export_bom_html renders a styled, self-contained HTML bill of materials straight from the compiled project, grouped and shareable without Altium, ready to hand to procurement.
Datasheet-First Discipline
Every component-surfacing response carries a _datasheet_guidance block with per-part search queries. The rule set, shipped inside the package, forbids LLM-fabricated datasheet values and requires vendor-sourced data for any claim.
Sch ↔ PCB Crossref
crossref_net compares the schematic pin list against the PCB pad list for a named net. It catches ECO drift, stale post-fabrication routing, and phantom nets introduced by port/sheet-entry rename conflicts.
SPICE Workflow
Audit every component for simulation readiness, attach SPICE primitives to passives in one pass, link vendor .mdl / .ckt files for active parts, then dispatch the simulator. Built-in guardrails against fabricated model files.
Focus-Independent Access
PCB queries succeed whether the user has a PCB tab, a schematic tab, or no tab in focus, as long as the project is open. No more "no PCB document is active" when the PCB is clearly loaded.
Fast & Compile-Cached
Persistent polling loop; ~10 ms per call in active mode. SmartCompile caches DM_Compile with a 2 s TTL so a multi-read review pays for one compile instead of a dozen. Explicit force_recompile and get_compile_freshness for cases that need fresh netlist state.
Design Agent Surface
Eight MCP tools (design_get_discipline, design_snapshot_inventory, design_validate_plan, design_preview_plan, design_execute_plan, design_audit_schematic, design_learn_from_layout, design_validate) let an LLM produce a structured DesignPlan JSON, preview the rendered sheet without touching Altium, instantiate it for real, audit the result for layout issues, and validate ERC + connectivity. Datasheet-first, NDA-isolated by construction.
Motif Composer + Sugiyama Placement
Three-layer placement strategy. Sugiyama / force-directed gives every part a baseline; the motif composer detects canonical sub-circuits (bypass cap, voltage divider, fb_divider, LC output, ...) via VF2 subgraph isomorphism and splats each match into its frozen canonical layout; canonical priors apply per-role-pair nudges (e.g. vcc_decoup sits 400 mils from its IC). A role-compatibility filter drops false positives (a structural RC-lowpass that's actually a decoupling cap stays out of the filter motif). Topology-agnostic: works for a buck, an LDO, an MCU, anything with a clean net graph.
Within-Block Wiring
Stub wires from each pin endpoint to the label / port (no more "floating net labels" ERC warnings), Manhattan routing between same-net pins, and rail consolidation that clusters power / ground pins so one VCC bar or GND triangle serves many pins instead of stacking N glyphs. Obstacle-aware: every L-path picks the orientation that crosses fewest component bodies, using real BoundingRectangle data queried from Altium.
Schematic Audit + Learn-from-Layout
design_audit_schematic returns structured {overlaps, wire_crossings, stacked_ports} with enough geometry for the planner to compute corrective moves, giving programmatic feedback without needing a visual snapshot. design_learn_from_layout diffs pre / post user edits and appends (part_role, anchor_role, dx, dy, rot_delta) rows that an offline aggregator turns into the placement priors the next run consumes.
Atomic-Parts Contract
Every existing-status Part carries mpn, footprint, datasheet_url. The inventory snapshot surfaces these per component; design_validate emits atomic_parts warnings when the contract is missed. Aligns with the KiCad Atomic / Digi-Key Library / atopile / JITX convention so generated designs are buildable, not just plausible.
Health & Doctor Preflight
eda-agent health runs offline preconditions (workspace dir, pointer file, bundled scripts). eda-agent doctor talks to Altium for a full preflight: process running, polling responsive, version match, save_all canary, optional --library path checks. --json for CI.
Activity Logs
Every command is appended to workspace/activity.log as CSV (timestamps, durations, command, response size). The bridge also writes bridge_trace.log for IPC-level diagnostics. Forensic visibility when something misbehaves.
pip-installable
No admin rights, no installer, no touching Altium's config. Drop in the bundled DelphiScript project and you're done.
Live and Conversational
Altium stays open. You see every change happen in real time. Stop the AI at any moment and continue working manually.
Tool Categories
Example Use Cases
Full-project design review
One design_review_snapshot call gives the AI project info, design stats, components, nets, rules, diff, messages, board stats, and BOM, plus a datasheet-fetch checklist. The AI then grounds every recommendation in the vendor datasheets it fetched.
Schematic review
The AI reads your schematic live. Ask it anything a reviewer would:
Sch ↔ PCB drift detection
The response shows sch pins, PCB pads, matched, and the diff in each direction. A non-empty pcb_only list means the board was fabricated from an earlier revision of the schematic and a later edit broke the post-ECO merge. Catch this before the next ECO push rips routed connections.
SPICE simulation setup
sch_get_simulation_readiness partitions the design into ready / needs-primitive / needs-file. The AI batches primitives onto passives in one call, searches vendor sites for the IC models, attaches them, and reports any holdouts. It will not fabricate a SPICE model on its own.
Library hygiene
The last one uses lib_add_pins. One call places the whole pinout in a single transaction instead of 48 LLM turns.
PCB spot-checks
Place a board from connectivity
pcb_plan_placement returns a complete coordinate set, force-directed clustering plus a per-part orientation search that minimises pin-level half-perimeter wirelength, and reports the HPWL improvement over the starting scatter. The AI applies it with pcb_move_components in one IPC round-trip, then pcb_render_svg + design_visual_review let it actually look at the result and flag overlaps or awkward orientations before routing.
Bulk changes
Bulk tools like batch_modify, pcb_move_components, and place_sch_components_from_library finish the whole operation in one IPC round-trip.
Autonomous schematic creation
The AI starts with design_get_discipline for the rules, runs design_snapshot_inventory across your .SchLib paths to bias choices toward existing parts (each one carrying mpn / footprint / datasheet_url per the atomic-parts contract), drafts a DesignPlan JSON, validates it offline with design_validate_plan, and renders an SVG preview with design_preview_plan. The whole pipeline (Sugiyama baseline + motif composer + canonical priors + within-block wiring) runs without touching Altium so the planner can inspect and iterate cheaply.
When the preview looks right, design_execute_plan instantiates everything for real: motif-aware placement of every existing-lib part, stub wires + Manhattan routing between same-net pins, rail consolidation for power / ground, and hidden Manufacturer / MPN / Datasheet parameters stamped on each refdes. design_audit_schematic then returns structured overlaps, wire-crossings, and stacked-port clusters with enough geometry for the planner to compute corrective placement_hints on the next pass. design_validate wraps ERC + unconnected-pins + compile messages. And when a user drags parts to fix layout, design_learn_from_layout appends the deltas to a priors log so the next run starts closer to what the user actually wanted.
Requirements
- Windows (Altium Designer is Windows-only)
- Python 3.11+
- Altium Designer, recent versions (AD20+ preferred)
- An MCP-compatible client (Claude Desktop, Claude Code, or any other MCP host)
- Optional, for the KiCad backend: KiCad 9+ with its API server enabled (Preferences → Plugins → KiCad API server)
Installation
Then register the scripts as a Global Project in Altium (DXP → Preferences → Scripting System → Global Projects) and launch the polling loop via File → Run Script... → StartMCPServer. Full setup details in the README.
Claude Code
Verify the connection with /mcp in a Claude Code session: altium should be listed as connected.
Other MCP clients
The server speaks standard MCP over stdio; any client that accepts a local stdio command will work. Invoke eda-agent (or eda-agent serve) as the subprocess.
Known Limitations
This tool is experimental. Read this before running on a design you haven't backed up.
- Altium DelphiScript engine can crash. Some tool paths trigger DelphiScript compile or runtime errors. The polling loop halts mid-execution and the MCP client times out. Recovery: stop the script in Altium's Script IDE (red Stop button or Ctrl+F3) and re-launch
StartMCPServer. Every identified crash is either fixed or guarded; report new ones with the exact identifier or line. - Built-in Altium buttons that depend on internal scripting can pause while the polling loop is active, because Altium's scripting engine is single-threaded. The loop releases on
detach_from_altium(within ~500 ms) or after 10 minutes of total silence from the MCP client. - ECO (sch → PCB update) is not reliably scriptable.
update_pcbwraps Altium's process command, which on some builds runs silently without applying changes; on others it pops the modal ECO dialog. Practical workflow: callupdate_pcb, checkcomponents_added_to_pcb, and if it's zero whilein_syncis false, dismiss the dialog manually. Every other tool then works normally. - Tools vary in maturity. Generic primitives and core application/project tools are best-tested. Some PCB modify operations (polygon repour, room creation, align-components) are less battle-tested. Queries are generally safer than mutations.
License
Apache License 2.0. Free to use, modify, and redistribute, including in commercial projects. This project is not affiliated with, endorsed by, or sponsored by Altium Limited. "Altium" and "Altium Designer" are trademarks of Altium Limited. eda-agent is an independent community tool that interoperates with Altium Designer via its published scripting API.
Try It, Contribute, or Report Issues
eda-agent is actively maintained. Bug reports, feature requests, and pull requests are welcome on GitHub.
github.com/salitronic/eda-agent